PE42552 Datasheet | pSemi

Description The PE42552 RF Switch is designed for use in Test/ATE, cellular and other wireless applications. This broadband general purpose switch maintains excellent RF performance and linearity from DC through 7500 MHz. The PE42552 integrates on-board CMOS control logic driven by a single-pin, low voltage CMOS control input. It also has a logic select pin which enables changing the logic definition of the control pin. Additional features include a novel user defined logic table, enabled by the on-board CMOS circuitry. The PE42552 also exhibits outstanding isolation of 44 d B at 7500 MHz, fast settling time, and is offered in a tiny 3x3 mm QFN package. The PE42552 is manufactured on Peregrine’s Ultra CMOS™ process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of Ga As with the economy and integration of conventional CMOS. Figure 1. Functional Diagram RFC RF1 SPDT Ultra CMOS™ RF Switch DC - 7500 MHz Features - - - - - - - - - Ha RP™-Technology-Enhanced - Eliminates Gate and Phase Lag - No insertion loss or phase drift - Fast settling time High linearity: 65 d Bm IIP3 Low insertion loss: 0.65 d B at 3.0 GHz, 0.85 d B at 6.0 GHz, 1.0 at 7.5 GHz High isolation of 47 d B at 3.0 GHz, 44 d B at 7.5 GHz 1 d B pression point: +34.5 d Bm typ. Logic Select pin to invert logic control High ESD: 1000 V HBM Absorptive switch design Standard 3x3 mm QFN package Figure 2. Package Type 16-lead 3x3 mm QFN RF2 50Ω CMOS Control Driver 50Ω LS CTRL .. Table 1. Target Electrical Specifications Temp = 25°C, VDD = 3.3V, VSS = 0V / -3.3V Parameter Operation Frequency MHz Insertion Loss 9 KHz 3000 MHz 6000 MHz 7500 MHz 3000 MHz 6000 MHz 7500 MHz 3000 MHz 6000 MHz 7500 MHz 3000 MHz 6000 MHz 7500 MHz 50% CTRL to 0.05 d B final value (-40 to +85 °C) Rising Edge 50% CTRL to 0.05 d B final value (-40 to +85 °C) Falling Edge 50% CTRL to 90% or 10% of final value (-40 to +85 °C) 800 MHz 7500 MHz 7500 MHz 7500 MHz 45 32 25 44...